1. Field of the Invention
The present invention relates to a semiconductor device of surface mounting type having a BGA (Ball Grid Array) structure which is one kind of IC package, and relates to its fabrication method.
2. Description of the Related Art
In recent years, semiconductor devices are made to become higher in integration and functions, as the performance of electronic apparatuses becomes higher. Such higher integration and functions increase the total number of external terminals. The number of terminals (pins) is increased more and more. Such an advance of increased terminals causes a decrease in external terminal pitch. In packages such as the QFP (Quad Flat Package) of conventional semiconductor devices, therefore, there have occurred problems such as lowering in external terminal strength or aggravation in positional precision at the time of mounting.
In order to avoid the above described problems, therefore, there has been developed a semiconductor device using a plastic substrate called BGA, which is a package of surf ace mounting type having solder balls instead of external terminals of the package.
FIG. 1 is a sectional view showing a configuration example of a conventional semiconductor device of BGA type. An element plane of an IC chip (semiconductor chip) 1 is stuck to a thin chip mounting substrate 3 (which may be replaced by tape). The IC chip 1 is electrically connected to the chip mounting substrate 3. On a back face of the chip mounting substrate 3, a plurality of solder balls (ball electrodes) 4 are attached in a matrix form. These solder balls 4 are electrically connected to the IC chip 1 via wiring of the substrate 3. The semiconductor device is mounted on a printed board (mounting board) 5 by soldering the solder balls 4 onto the printed board 5.
If the printed board 5 having a semiconductor device of the conventional BGA structure mounted thereon as described above is housed in a casing or the like of an electronic apparatus and actually used, the temperature becomes high when the electronic apparatus is operating and the temperature returns to normal when not operating. A temperature cycle is thus generated. By this temperature cycle, therefore, the printed board 5 and the semiconductor substrate mounted thereon are warmed and cooled. At that time, a coefficient of thermal expansion (3.5 ppm) of the IC chip 1 made of silicon is different from a coefficient of thermal expansion (18 ppm) of the printed board 5 made of resin. In addition, the IC chip 1 is stuck to the substrate 3 securely.
Eventually, therefore, thermal stress caused by the above described difference in coefficient of thermal expansion is applied to the solder balls 4. Because of fatigue of a metal in the solder balls 4, a crack or the like is caused. This crack develops and results in breakdown of joint to the printed board 5. Thus there is a fear of occurrence of an electric open circuit. If the above described temperature cycle is repeated a large number of times, electric connection between the printed board 5 and the semiconductor device becomes different from predetermined connection. There is a problem that a failure is caused by this.
Furthermore, the area of the substrate 3 cannot be made wider than the area of the IC chip 1. Therefore when the IC chip 1 has a large number of functions and consequently a large number of solder balls 4 must be attached to the substrate 3, the size of each of the solder balls must be made small. As a result, it becomes necessary to fabricate solder balls of various sizes. This results in a problem that the fabrication becomes troublesome and the cost of the solder balls 4 becomes high.
The present invention has been made in order to solve the above described problems of the conventional technique. An object of the present invention is to provide a semiconductor device and its fabrication method, capable of stably maintaining electric connection between a printed board and solder balls even if a temperature cycle is repeated, and capable of attaching a large number. of solder balls without reducing the size of the solder balls.
In order to achieve the above described object, there is provided a semiconductor device including a semiconductor chip, hangover portions formed by hardening resin on side planes of the semiconductor chips, insulative tape having signal wiring and ball electrodes electrically connected to the signal wiring on a main plane thereof, an adhesive agent layer having elasticity for sticking the semiconductor chips and the hangover portions to a back plane of the insulative tape, and insulative tape having signal wiring and ball electrodes electrically connected to the signal wiring on a main plane thereof, an adhesive agent layer having elasticity for sticking the semiconductor chips to a back plane of the insulative tape, and an electric connection portion for electrically connecting the semiconductor chips to the signal wiring of the insulative tape.
According to the invention, after ball electrodes of semiconductor chips are soldered to a printed board or the like and mounting is conducted, a temperature cycle is caused by operation and operation cease of the semiconductor chip. Since at this time the semiconductor chip made of silicon is different from the printed board made of resin in coefficient of thermal expansion, thermal stress occurs between them. According to the present invention, the adhesive agent layer has elasticity, and consequently the thermal stress is absorbed by the elasticity and it is not applied to the ball electrodes. As a result, little fatigue of a metal occurs in the ball electrodes. Since cracks are not generated, the ball electrodes do not come into an open state with respect to wiring of the printed board. Over a long period of time, therefore, electric connection between the semiconductor chip and the printed board is stably maintained via the ball electrodes. Furthermore, the area of the insulative tape can be increased by the area of the hangover portions as compared with the size of the semiconductor chip. As a result, a larger number of ball electrodes can be disposed on the insulative board without reducing the size of each of the ball electrodes.
In a preferred embodiment of the present invention, the adhesive agent layer has a Young""s modulus value in the range of 1 MPa to 5000 MPa.
According to this embodiment, if the Young""s modulus of the adhesive agent layer is smaller than 1 MPa, the elasticity of the adhesive agent layer is too great. When conducting wire bonding on the semiconductor chip to the insulative tape, therefore, the adhesive agent layer cannot support the insulative tape and consequently sufficient joint strength cannot be obtained. If the Young""s modulus of the adhesive agent layer is larger than 5000 MPa, the elasticity of the adhesive agent layer is small. In this case, therefore, the stress caused between the semiconductor chip and the printed board by the temperature cycle cannot be absorbed. Consequently, fatigue of the metal in the ball electrodes advances in a short period of time, and the electric connection between the semiconductor chip and the printed board comes into an open state in a short period of time.
In a preferred embodiment of the present invention, the electric connection portion includes wires for connecting electrode pads of the semiconductor chip to electrode pads disposed on the signal wiring of the insulative tape, and a seal portion seals the electric connection portion with seal resin so as not to expose the wires.
According to this embodiment, the wires are buried within the seal resin, and are not exposed. Therefore, the wires are not cut, and the electric connection between the semiconductor chip and the insulative board can be stably maintained over a long period of time.
In a preferred embodiment of the present invention, resin forming the overhang portions of the semiconductor chip is resin of the same family as resin forming the adhesive agent layer.
According to this embodiment, resin forming the overhang portions of the semiconductor chip belongs to the same family as resin forming the adhesive agent layer. Therefore, stickiness between them is improved, and exfoliation between them can be prevented.
In a preferred embodiment of the present invention, each of the overhang portions of the semiconductor chip has a thickness of at least 0.1 mm.
If according to this embodiment each of the overhang portions has a thickness of at least 0.1 mm at the time of a test conducted when construction of the semiconductor device has been completed, contact force of at least 10 gf is obtained to connect the solder ball to a test socket terminal. It is possible to connect the ball electrode to the test terminal securely and conduct the test without hindrance.
In a preferred embodiment of the present invention, upper corners of the hangover portions of the semiconductor chip are rounded off.
According to this embodiment, upper corners of the hangover portions are rounded off. Therefore, it is possible to prevent this portion from being caught by something and broken. In addition, the amount of resin required to form the overhang portions can be reduced by an amount of portions rounded off.
In a preferred embodiment of the present invention, the overhang portions of the semiconductor chip are made thinner in thickness than the semiconductor chip.
According to this embodiment, the thickness of the hangover portions is made thinner than the thickness of the semiconductor chip, and they are aligned on the adhesive agent layer side. Then the height of the top plane of the semiconductor chip becomes higher than the height of the overhang portions. Although the load is applied to the top plane of the semiconductor device at the time of the test of the semiconductor device, therefore, non-uniform load is not applied to the overhang portions which are hard to be flattened, but all of the load is applied to the top plane of the semiconductor chip uniformly. As a result, the overhang portions are prevented from being cracked and destroyed thereby.
In a preferred embodiment of the present invention, each of the overhang portions of the semiconductor chip has a Young""s modulus value in the range of 1 MPa to 5000 MPa.
According to this embodiment, the Young""s modulus value of the overhang portions is in the same range as that of the adhesive agent layer. The difference of thermal stress caused by the temperature cycle is absorbed. Destruction or the like of the overhang portions can be avoided over a long period of time.
In a preferred embodiment of the present invention, the overhang portions are formed on two side planes or four planes of the semiconductor chip.
According to this embodiment, insulative tape having an area larger than that of the semiconductor chip can be used whichever the hangover portions are provided on two side planes of the semiconductor chip or the hangover portions are provided on four side planes of the semiconductor chip. A larger number of ball electrodes can be attached without changing the size of the ball electrodes.
In a preferred embodiment of the present invention, a part of the semiconductor chip is buried in the adhesive agent layer.
According to this embodiment, a part of the semiconductor chip is buried in the adhesive agent layer. Accordingly, the semiconductor chip supports external force exercised in its horizontal direction at the internal wall of the adhesive agent layer. Therefore, the semiconductor chip is prevented from being shifted with respect to the adhesive agent layer. A package having strong mechanical strength can thus be obtained.
In a preferred embodiment of the present invention, the ball electrodes are disposed on the insulative tape so that the ball electrodes will not be disposed on positions extending over both the semiconductor chip and the hangover portions.
According to this embodiment, since the semiconductor chip is different in characteristics from the overhang portions, the coplanarity at the boundary between the semiconductor chip and the hangover portions is not maintained when the tape is deformed. If ball electrodes are attached in this portion, therefore, the ball electrode gets out of place. According to this embodiment there are no ball electrodes in this portion. As a result, the ball electrode does not get out of place.
In a preferred embodiment of the present invention, a mark for positioning at the time of mounting is provided on either a back plane of the semiconductor chip or said overhang portions.
According to this embodiment, a position of a solder ball of the semiconductor chip and a pattern of the mounting board can be aligned to a predetermined position by watching from the back plane side of the semiconductor chip and using the positioning mark as a reference. As a result, the mounting efficiency can be improved.
In a preferred embodiment of the present invention, a diameter of each of the ball electrodes is larger than a diameter of each of circular ball electrode mounting portions formed on the main plane of the insulative tape.
According to this embodiment, the diameter of the ball electrode is larger. In a test conducted when the construction of the semiconductor device is finished, a test socket terminal easily grasps the ball electrode. The test can be thus conducted smoothly.
In a preferred embodiment of the present invention, an edge of a solder resist stuck to the main plane of the insulative tape is located in a position retreated from an edge of an opening portion for wire bonding formed in the insulative tape for the purpose of forming the electric connection portion.
According to this embodiment, a difference in level is provided between the surface of the insulative board ranging from the opening portion to the solder resist and the solder resist. When applying seal resin to the electric connection portion of the opening portion, therefore, it is possible to dam up the seal resin by the level difference and prevent the seal resin from flowing out to unnecessary parts.
In a preferred embodiment of the present invention, a gap between a top plane of the electrode pads and the seal portion is at least 0.05 mm, when the ball electrodes are soldered to electrode pads on a mounting board and thereby the semiconductor device is mounted on the mounting board.
According to this embodiment, the gap between the top plane of the electrode pad on the mounting board and the seal portion is at least 0.05 mm. When cleaning the semiconductor device with a flux or the like at the time of mounting, therefore, the flux flows through the gap smoothly. It is thus possible to prevent the flux from being accumulated and left in the gap after the cleaning.
In a preferred embodiment of the present invention, the wires are buried on the inside of at least 0.01 mm from the surface of the seal resin of the seal portion.
According to this embodiment, the wire is covered by seal resin of at least 0.01 mm. It is thus possible to prevent the wire from being exposed to the outside due to wear of the seal resin or the like and being cut. The reliability of the wire can be ensured.
In a preferred embodiment of the present invention, a plurality of electrode pads lining up in a straight line on the insulative tape and a plurality of electrode pads lining up in a straight line on the semiconductor chip are arranged in the same direction, and the plurality of electrode pads of the insulative tape are opposed to corresponding electrode pads of the plurality of electrode pads of the semiconductor chip with the same distance therebetween.
According to this embodiment, all wires can be disposed in parallel when connecting a plurality of electrode pads of the insulative tape to a plurality of electrode pads of the semiconductor chip. Therefore, it is possible to minimize the area required for the wire bonding and reduce the cost of the tape.
In a preferred embodiment of the present invention, each of electrode pads on the signal wiring takes the shape of a rectangle.
According to this embodiment, the load of the bonding tool is applied stably, and the required electrode pad area can be minimized.
In a preferred embodiment of the present invention, a mark for positioning at the time of wire bonding which can be watched from an opening portion for wire bonding or a dedicated opening portion provided in the insulative tape is indicated on the semiconductor chip.
According to this embodiment, the precision of the wire bonding can be raised by conducting the wire bonding with this mark as a reference.
In a preferred embodiment of the present invention, a plurality of electrode pads are arranged in a straight line near a center of an element plane of the semiconductor chip.
According to this embodiment, a wire bonding hole opened to the insulative board is closed by the element plane of the semiconductor chip when the semiconductor chip has been stuck to the insulative tape. When sealing this wire bonding hole with seal resin, therefore, the resin does not go round onto the top plane of the insulative tape, and the insulative tape can be cut smoothly.
In a preferred embodiment of the present invention, a plurality of electrode pads are arranged near a center of an element plane of the semiconductor chip so as to form a cross, and a wire bonding hole is opened in the insulative tape so as to form a cross.
According to this embodiment, a, large number of electrode pads can be disposed in a cross form in the case where the semiconductor chip is provided with a larger number of functions. It is thus possible to cope with a larger number of pins.
In a preferred embodiment of the present invention, a mark for positioning at the time of chip mount/wire bonding/solder ball mounting is provided outside a signal wiring area on the insulative tape.
According to this embodiment, the mark for positioning is located outside the signal wiring on the insulative tape. Therefore, this mark does not become a,hindrance, and the degree of freedom of wiring in the insulative tape can be improved.
In a preferred embodiment of the present invention, a function of the semiconductor chips is selected according to the number and positions of ball electrodes mounted on ball mounting portions provided in the insulative tape.
According to this embodiment, whether a ball electrode is attached or not acts as a switch. Thus the function of the semiconductor chip is, selected. As a result, the same semiconductor chip can be used for a plurality of functions separately.
In a preferred embodiment of the present invention, a function of the semiconductor chip is selected according to the number and positions of wires for connecting the electrodes arranged on the semiconductor chip to the electrode pads arranged on the insulative tape.
According to this embodiment, whether a ball electrode is attached or not acts as a switch. Thus the function of the semiconductor chip is selected. As a result, the same semiconductor chip can be used for a plurality of functions separately.
Furthermore, in order to achieve the above described object, there is provided a method for fabricating the above described semiconductor device.
In a preferred embodiment of the present invention, the method includes the step of applying an adhesive agent of the same family as resin forming the overhang portions to side planes of the semiconductor chip and then forming the overhang portions.
According to this embodiment, the overhang portions are formed of resin belonging to the same family as the adhesive agent, on side planes of the semiconductor chip having the adhesive agent applied thereto. Therefore, close adhesion between the side planes of the semiconductor chip and the resin is enhanced. Thus the hangover portions can be jointed to the side planes of the semiconductor chip securely.
In a preferred embodiment of the present invention, the method includes the step of conducting wire bonding of the wires to electrode pads of each of the semiconductor chips and then conducting wire bonding of the wires to the electrode pads disposed on the signal wiring of the insulative tape.
According to this embodiment, the wire is subjected earlier to wire bonding to an electrode pad of the semiconductor chip. The height of the bonding portion of the semiconductor chip side is high. The height of the bonding portion on the insulative tape side subjected to the second wire bonding can be made low. Therefore, the height of the wire can be constrained to be low. As a result, the height of the seal portion covering the wires can made low.
In a preferred embodiment of the present invention, the method includes the step of applying seal resin to the electric connection portion by moving a resin ejecting nozzle and thereby forming the seal portion.
According to this embodiment, the resin ejecting nozzle is light in weight and small in inertia. Therefore, the precision of the application range of the seal resin can be improved.
In a preferred embodiment of the present invention, the method includes the step of applying seal resin to the electric connection portion and then lowering the pressure around the seal resin.
According to this embodiment, the vicinity of the seal resin becomes a low pressure or vacuum, and air contained therein gets out. Thus, the density within the seal resin can be made uniform, and the quality can be improved.
In a preferred embodiment of the present invention, the method includes the step of lowering the pressure around the seal resin and then curing the seal resin.
According to this embodiment, air contained in the seal resin is put out and then the seal resin is cured. As a result, the seal portion having a uniform density and a good quality can be formed.
In a preferred embodiment of the present invention, the method includes the step of sealing the electric connection portion and then attaching the ball electrodes to the insulative tape.
According to this embodiment, the electric connection portion is sealed with resin earlier. When attaching the ball electrodes, therefore, the bonding electrode pads are not contaminated by the flux used at the time of attaching the ball electrodes. In addition, the ball electrodes are not contaminated by out-gas generated when curing the seal resin. The ball electrodes can be attached in a clean state.
In a preferred embodiment of the present invention, the method includes the step of bonding the wires to the electrode pads of the semiconductor chip and to the electrode pads of the insulative tape, and then sealing the electric connection portion with the seal resin.
According to this embodiment, the electric connection portion is sealed with resin. Therefore, the insulation performance is improved. Furthermore, it is possible to protect the wires of the electric connection portion from a corrosive substance and improve the durability of the electric connection portion.
In a preferred embodiment of the present invention, the wires are in the range of 20 to 40 xcexcm in diameter.
According to this embodiment, the wires are in the range of 20 to 40 xcexcm in diameter. For the stress generated by the temperature cycle, therefore, the wires do not break. In addition, it is possible to prevent the stress from being concentrated onto the semiconductor chip side or the insulative board side by the elasticity of the wires.
In a preferred embodiment of the present invention, the method includes the step of arranging a plurality of semiconductor chips in a direction perpendicular to a longitudinal direction of the insulative tape.
According to this embodiment, the density of arranging semiconductor chips per area of the insulative tape is improved as compared with the case where semiconductor chips of one column are arranged in a direction perpendicular to the longitudinal direction of the insulative tape. Accordingly, useless portions of the insulative tape can be eliminated. And the cost can be reduced.
In a preferred embodiment of the present invention, the method includes the step of arranging a plurality of semiconductor chips on the insulative tape so as to form a matrix, and the step of dicing the tape in a longitudinal direction of the tape, and then dicing the tape in a direction perpendicular to the longitudinal direction, and thereby cutting off the semiconductor chips separately.
According to this embodiment, the number of the semiconductor chips arranged in the longitudinal direction of the insulative tape is larger. By cutting the insulative tape first in the longitudinal direction and then cutting the tape in a direction perpendicular to the longitudinal direction, therefore, the number of times of dicing can be reduced.
In a preferred embodiment of the present invention, the method includes the step of hardening resin between the plurality of semiconductor chips arranged on the insulative tape, and the step of dicing the insulative tape together with the resin in the longitudinal direction of the tape, and then dicing the insulative tape together with the resin in a direction perpendicular to the longitudinal direction, and thereby cutting off the semiconductor chips separately.
According to this embodiment, space between a plurality of semiconductor chips on the insulative tape is filled up by resin so that the resin may be stuck to the side planes of the semiconductor chips. When each semiconductor chip is cut off by dicing the resin portion, the resin is jointed to side planes of each semiconductor chip and forms the overhang portions. In addition, if the interval between the semiconductor chips on the insulative tape is determined appropriately, the hangover portions of a desired size are formed by simply cutting the semiconductor chips as described above. As compared with the case where the semiconductor chips are not disposed at appropriate intervals and the hangover portions are not formed by simply cutting, it is possible to reduce the number of times of dicing and cutting loss, improve the working efficiency, and reduce the working cost.
In a preferred embodiment of the present invention, a line-up direction of electrode pads of the semiconductor chip coincides with the longitudinal direction of the insulative tape.
According to this embodiment, the number of the semiconductor chips arranged in the longitudinal direction of the insulative tape is larger. By aligning the line-up direction of the bonding bads with the longitudinal direction of the insulative tape, therefore, the wire bonding can be conducted along the longitudinal direction. The number of changes of direction in conducting the wire bonding on semiconductor chips of another column can thus be reduced.
In a preferred embodiment of the present invention, the tape is rotated by 90 degrees, and thereby the dicing direction is changed when dicing the insulative tape.
According to this embodiment, the cut direction can be changed by turning the tape by 90 degrees when cutting the insulative tape lengthwise and breadthwise. In addition only one blade for dicing is needed.
The nature, principle and utility of the invention will become more apparent from the following detailed description when read in conjunction with the accompanying drawings.